Field Programmable Analog Array Device Research Articles

Elementary Negative Group Delay Filter Functions

AbstractA theoretical study of the behavior of some elementary first- and second-order functions, which are suitable for realizing negative group delay, is performed in this work. As both the gain and phase responses are simultaneously considered, important derivations related to the actual bandwidth of operation are derived accompanied by useful design tips. The presented theory is supported by simulation and experimental results obtained through the utilization of typical active-RC filter structures, as well as from a field-programmable analog array device.

Field Programmable Analog Array Based Non-Integer Filter Designs

The approximation of the frequency behavior of fractional-order, power-law, and double-order filters can be performed by the same rational integer-order transfer function. This can be achieved through the utilization of a curve fitting based approximation. Moreover, their implementation can be performed by the same core, by only changing the corresponding time constants and scaling factors. The aforementioned findings are experimentally verified using a Field Programmable Analog Array device.

Complex‐order controller design examples and their implementation

AbstractA systematic method for approximating the complex‐order Laplacian operator by realizable integer‐order transfer functions is presented in this work. The realization is performed by a simple structure where only one active element is used. Thanks to the employment of complex‐order impedances, both integrators and differentiators can be readily implemented by the same core simply by interchanging the associated impedance locations. The validity of the presented concept is verified through simulation and experimental results, using the OrCAD PSpice suite and a Field Programmable Analog array device.

A 1 + α Order Generalized Butterworth Filter Structure and Its Field Programmable Analog Array Implementation

Fractional-order Butterworth filters of order 1 + α (0 < α < 1) can be implemented by a unified structure, using the method presented in this paper. The main offered benefit is that the cutoff frequencies of the filters are fully controllable using a very simple method and, also, various types of filters (e.g., low-pass, high-pass, band-pass, and band-stop) could be realized. Thanks to the employment of a Field Programmable Analog Array device, the implementation of the introduced method is fully reconfigurable, in the sense that various types of filter functions as well as their order are both programmable.

Approximation and realization of power-law all-pass filters

Non-integer power-law all-pass transfer functions, are approximated by suitable integer-order transfer functions in this work. The derivation of the integer-order transfer functions is based on the analytic expansion of the (non-integer) power-law transfer functions through the utilization of the binomial theorem. The offered benefit is the derivation of stable integer-order transfer functions. This study is supported by experimental results, obtained using a Field Programmable Analog Array device, after the employment of curve fitting based approximation techniques.

FPAA-Based Realization of Filters with Fractional Laplace Operators of Different Orders

A simple and direct procedure for implementing fractional-order filters with transfer functions that contain Laplace operators of different fractional orders is presented in this work. Based on a general fractional-order transfer function that describes fractional-order low-pass, high-pass, band-pass, band-stop and all-pass filters, the introduced concept deals with the consideration of this function as a whole, with its approximation being performed using a curve-fitting-based technique. Compared to the conventional procedure, where each fractional-order Laplace operator of the transfer function is individually approximated, the main offered benefit is the significant reduction in the order of the resulting rational function. Experimental results, obtained using a field-programmable analog array device, verify the validity of this concept.

Power-Law Compensator Design for Plants with Uncertainties: Experimental Verification

A power-law compensator scheme for achieving robust frequency compensation in control systems including plants with an uncertain pole, is introduced in this work. This is achieved through an appropriate selection of the compensator parameters, which guarantee that the Nyquist diagram of the open-loop system compensator-plant crosses a fixed point independent of the plant pole variations. The implementation of the fractional-order compensator is performed through the utilization of a curve-fitting-based technique and the derived rational integer-order transfer function is realized on a Field-Programmable Analog Array device. The experimental results confirm that the the phase margin is well preserved, even for ±40% variation in the pole location of the plant.

Simple implementations of fractional-order driving-point impedances: Application to biological tissue models

A novel procedure for the circuit implementation of the driving-point impedance of frequency-domain material models, constructed from fractional-order elements of arbitrary type and order, is introduced in this work. Following this newly introduced concept, instead of emulating separately each fractional-order element in the model under consideration, the direct emulation of the complete model can be achieved through the approximation of the total impedance function. The magnitude and phase frequency responses of the impedance function are first extracted and approximated through curve-fitting-based techniques. A rational integer-order driving-point impedance function is then obtained and realized using appropriately configured passive and/or active topologies. Comparison between the conventional method and the proposed method reveals that the achieved benefit is the significant reduction of the passive and/or active components count. Verification of the introduced concept is performed through circuit simulation results using OrCAD PSpice in the case of a root/stem/electrode interface model, as well as through experimental results where the driving-point input impedance of the human respiratory system under different health conditions is synthesized on a Field-Programmable Analog Array device.

Large-Scale Field-Programmable Analog Arrays

Large-scale field-programmable analog array (FPAA) devices could enable ubiquitous analog or mixed-signal low-power sensor to processing devices similar to the ubiquitous implementation of the existing field-programmable gate array (FPGA) devices. Design tools enable high-level synthesis to gate/transistor design targeting today's FPGA devices and the opportunity for analog or mixed-signal applications with FPAA devices. This discussion will illustrate the FPAA concepts and FPAA history. The development of FPAAs enables the development of multiple potential metrics, and these metrics illustrate future FPAA device directions. The system-on-chip (SoC) FPAA devices illustrate the IC capabilities, computation, tools, and resulting hardware infrastructure. SoC FPAA device generation has enabled analog computing with levels of abstraction for application design.

Design and Implementation of Autonomous and Non-Autonomous Time-Delay Chaotic System Based on Field Programmable Analog Array.

Time-delay chaotic systems can have hyperchaotic attractors with large numbers of positive Lyapunov exponents, and can generate highly stochastic and unpredictable time series with simple structures, which is very suitable as a secured chaotic source in chaotic secure communications. But time-delay chaotic systems are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of electronic components and can be difficult and time consuming. At this stage, we can now solve this question by using FPAA (Field-Programmable Analog Array). FPAA is a programmable device for implementing multiple analog functions via dynamic reconfiguration. In this paper, we will introduce two FPAA-based design examples: An autonomous Ikeda system and a non-autonomous Duffing system, to show how a FPAA device is used to design programmable analog time-delay chaotic systems and analyze Shannon entropy and Lyapunov exponents of time series output by circuit and simulation systems.

VMM + WTA Embedded Classifiers Learning Algorithm Implementable on SoC FPAA Devices

This paper presents a learning algorithm for a vector-matrix multiplier (VMM) + k-winner-take-all (WTA) classifier one-layer architecture on a large-scale field programmable analog array (FPAA). The technique enables opportunities for embedded, ultra-low power machine learning, techniques typically considered for large servers. To develop this training algorithm, this paper starts by understanding fundamental equivalent transformations for the VMM + WTA classifier networks. A VMM+ WTA structure can exactly compute a self-organizing map (SOM) or vector quantization (VQ) operation, in addition to other transformations. SOM, VQ, and Gaussian mixture models learning concepts are utilized for the training algorithm of this single one-layer network. An on-chip clustering step determines the initial weight set for ideal target and background values. Null symbols are important for the algorithm and are set from midpoints of the target values. The results are shown both as numerical simulation of the VMM+WTA learning network, illustrating some numerical differential equation simulation limitations for this problem, as well as experimental measurements implemented on an system on chip FPAA device.

Implementations of Modified Chaotic Neural Models with Analog Reconfigurable Hardware

This paper focuses on implementations of two modified Aihara's chaotic neuron models and a simple chaotic neural network constructed with two chaotic neurons in a programmable and reconfigurable manner with an analog programmable device, FPAA (Field Programmable Analog Array). After testing the chaotic behaviors of two chaotic neuron models and a simple chaotic neural network through numerical analyses that consist of time domain responses, phase portrait illustrations and bifurcation diagrams, the experimental setup is constructed with a FPAA device. The parametric adjustments of chaotic neural structures are possible with the proposed flexible design methodology and different chaotic neuron models are constructed on the same reconfigurable device without any hardware changes. Experimental results verify the dynamic behaviors of these chaotic neural structures and demonstrate the efficiency of programmable implementations.

Rapid prototyping of algorithmic A/D converters based on FPAA devices

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.

Experimental realizations of the HR neuron model with programmable hardware and synchronization applications

This study presents experimental realizations of the HR neuron model with programmable hardware and synchronization applications. The HR neuron model exhibiting burst, spike, and chaotic dynamics has been implemented with both FPAA (Field Programmable Analog Array) and FPGA (Field Programmable Gate Array) devices. These devices provide flexible design possibilities such as reducing the complexity of design, real-time modification, software control and adjustment within the system. And it is also examined experimentally that how the synchronization of two HR neurons are able to achieve by using these hardware. The experimental results obtained from FPAA and FPGA based realizations agree with the numerical simulations very well.

Flexible ECG acquisition system based on analog and digital reconfigurable devices

This paper presents an electrocardiogram (ECG) acquisition system based on reconfigurable devices. This system allows redesigning the analog conditioning stage thanks to the use of a Field Programmable Analog Array (FPAA) device, which may be adapted to the requirements of the signal shape and/or medical specifications. Simulated and real ECG signals have been acquired using this system in a three-lead configuration. A detailed study of its technical features has been carried out, showing good suitability for ECG acquisition. Further digital ECG signal processing is performed on a Field Programmable Gate Array (FPGA) device, which has allowed different digital configurations to be tested, including FIR and wavelet filtering and identification of wave features such as the QRS complex. In addition, the FPGA device is in charge of FPAA reconfiguration. Thus, the pairing of FPAA and FPGA devices conforms a compact and versatile bio-signal acquisition platform. This platform has shown very good performance with different types of electrodes, and has also demonstrated the dynamic reconfiguration capabilities of these devices, which enable, for example, the tuning of gain and bandwidth as required by different input conditions and ECG application requirements. The analyzed performance parameters provide values such as 102 dB CMRR (Common-Mode Rejection Ratio), 14-bit ADC resolution, and 75 dB SNR (signal-to-noise ratio), among others, thus satisfying the minimum requirements for clinical use.

UNIVERSAL PROGRAMMABLE CHAOS GENERATOR: DESIGN AND IMPLEMENTATION ISSUES

Chaos generators are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of circuitry that comprises different passive and active electronic components like individual op-amps, comparators, analog multipliers, trigonometric function generators. Anyone who wants to experimentally investigate different structurally chaotic systems has to provide a significant amount of circuit hardware. This process may be hard and time consuming. At this stage, the question to be asked: Is there a unique analog component for implementing a universal analog chaos generator which is capable of generating the chaotic signals of nearly all analog-based chaotic systems. Fortunately, we can now answer this question positively. This analog device is FPAA (Field-Programmable Analog Array). FPAA is the analog equivalent of the FPGA (Field-Programmable Gate Array) used as programmable device in digital signal processing. FPAA is a programmable device for implementing a rich variety of systems including analog functions via dynamic reconfiguration. FPAA can be configured in real time which allows the designers to modify the design or make completely new design in real time. In this paper, we aim to show how FPAA device can be used as universal device for design and implementation of programmable analog chaos generators. For this purpose, we will introduce three FPAA-based design examples: autonomous Chua's circuit, nonautonomous MLC (Murali–Lakshmanan–Chua) circuit and a chaotic system based on a PLL (Phase Locked Loop) model.